This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2001-379708, filed on Dec. 13, 2001; the entire contents of which are incorporated herein by reference.
The present invention relates to a differential amplifier that is used for wireless communication terminals.
Various methods for reducing distortion of a differential amplifier have been devised, including those employing negative feedback and active devices, but all of the methods are not suitable for a differential amplifier that handles high frequency signals because of their respective restrictions upon phase compensation capacitance and input/output characteristics. Hence, such a differential amplifier handling high frequency signal is usually designed as disclosed in FIG. 10.
As can be seen in FIG. 10, an emitter follower 5 is comprised of NPN transistors Q1 and Q2 and current sources 7 and 9. Also, a differential amplifying circuit 11 consists of NPN transistors Q3 and Q4 in a differential pair, resistances R1, R2, R3 and R4, and a current source 13. The emitter follower 5 and the differential amplifying circuit 11 form a differential amplifier.
Signals applied respectively to bases of the transistors Q1 and Q2 are, after being buffered in these transistors, applied to bases of the transistors Q3 and Q4 and then converted, due to mutual conductance between the differential transistors Q3 and Q4 in a pair, from voltage to current, and thus, the signals are amplified.
When differential input signals applied to input terminals 1 and 3 are 2-tone signals (i.e., signals different in frequency but the same in level), output current from the differential amplifying circuit 11 exhibits IM3 (third order intermodulation) distortion.
The most simplified way of reducing such distortion in the state of the art of circuit technologies is enhancing current that flows in the transistors Q3 an Q4 in the differential amplifying circuit 11.
In this way, however, in order to raise or enhance third order output intercept points (OIP3 located at output terminals 19 and 21) by 6 dB which may be treated as indices of the distortion, the current applied to the differential amplifying circuit 11 must be approximately doubled, and this is not desirable in view of demand to lower power consumption.
A differential amplifier according to an embodiment of the present invention comprises an emitter follower, a differential amplifying circuit connected in a succeeding stage to the emitter follower, and a load circuit to compensate distortion of the differential amplifying circuit.